A2F200M3F-1CS288

Microchip Technology A2F200M3F-1CS288

Part No:

A2F200M3F-1CS288

Datasheet:

-

Package:

288-TFBGA, CSPBGA

AINNX NO:

30889976-A2F200M3F-1CS288

Description:

SoC FPGA A2F200M3F-1CS288

Products specifications
  • Package / Case
    288-TFBGA, CSPBGA
  • Surface Mount

    having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

    YES
  • Supplier Device Package
    288-CSP (11x11)
  • Number of Terminals
    288
  • RoHS
    N
  • Maximum Clock Frequency
    100 MHz
  • L1 Cache Instruction Memory
    -
  • L1 Cache Data Memory
    -
  • Data RAM Size
    64 kB
  • Number of Logic Elements
    2000 LE
  • Moisture Sensitive
    Yes
  • Number of Logic Array Blocks - LABs
    -
  • Factory Pack QuantityFactory Pack Quantity
    176
  • Tradename
    SmartFusion
  • Number of I/Os
    MCU - 31, FPGA - 78
  • Package
    Tray
  • Base Product Number
    A2F200
  • Mfr
    Microchip Technology
  • Product Status
    Active
  • Package Description
    TFBGA, BGA288,21X21,20
  • Package Style
    GRID ARRAY, THIN PROFILE, FINE PITCH
  • Package Body Material
    PLASTIC/EPOXY
  • Package Equivalence Code
    BGA288,21X21,20
  • Supply Voltage-Nom
    1.5 V
  • Reflow Temperature-Max (s)
    NOT SPECIFIED
  • Supply Voltage-Min
    1.425 V
  • Operating Temperature-Max
    85 °C
  • Rohs Code
    No
  • Manufacturer Part Number
    A2F200M3F-1CS288
  • Clock Frequency-Max
    100 MHz
  • Package Code
    TFBGA
  • Package Shape
    SQUARE
  • Part Life Cycle Code
    Active
  • Ihs Manufacturer
    MICROSEMI CORP
  • Supply Voltage-Max
    1.575 V
  • Risk Rank
    5.24
  • Packaging

    Semiconductor package is a carrier / shell used to contain and cover one or more semiconductor components or integrated circuits. The material of the shell can be metal, plastic, glass or ceramic.

    Tray
  • Series
    A2F200
  • Operating Temperature

    The operating temperature is the range of ambient temperature within which a power supply, or any other electrical equipment, operate in. This ranges from a minimum operating temperature, to a peak or maximum operating temperature, outside which, the power supply may fail.

    0°C ~ 85°C (TJ)
  • JESD-609 Code
    e0
  • Terminal Finish
    TIN LEAD SILVER
  • HTS Code

    HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

    8542.39.00.01
  • Technology
    CMOS
  • Terminal Position
    BOTTOM
  • Terminal Form

    Occurring at or forming the end of a series, succession, or the like; closing; concluding.

    BALL
  • Peak Reflow Temperature (Cel)
    NOT SPECIFIED
  • Terminal Pitch

    The center distance from one pole to the next.

    0.5 mm
  • Reach Compliance Code
    compliant
  • JESD-30 Code
    S-PBGA-B288
  • Number of Outputs
    78
  • Qualification Status

    An indicator of formal certification of qualifications.

    Not Qualified
  • Power Supplies

    an electronic circuit that converts the voltage of an alternating current (AC) into a direct current (DC) voltage.?

    1.5,1.8,2.5,3.3 V
  • Temperature Grade

    Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

    OTHER
  • Speed
    100MHz
  • RAM Size
    64KB
  • Core Processor
    ARM® Cortex®-M3
  • Peripherals
    DMA, POR, WDT
  • Program Memory Size
    256 kB
  • Connectivity
    EBI/EMI, Ethernet, I²C, SPI, UART/USART
  • Architecture
    MCU, FPGA
  • Number of Inputs
    78
  • Organization
    4608 CLBS, 200000 GATES
  • Seated Height-Max
    1.05 mm
  • Programmable Logic Type

    Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

    FIELD PROGRAMMABLE GATE ARRAY
  • Primary Attributes
    ProASIC®3 FPGA, 200K Gates, 4608 D-Flip-Flops
  • Number of CLBs
    4608
  • Number of Logic Cells

    An FPGA contains a large number of logic cells. Each logic cell can be configured to implement a certain set of functions. Each logic cell has a fixed number of inputs and outputs. Flip-flop can be incorporated into a multiplexer-based logic module to implement sequential logic.

    4608
  • Number of Cores
    1 Core
  • Number of Equivalent Gates
    200000
  • Flash Size
    256KB
  • Width
    11 mm
  • Length
    11 mm
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