Teledyne e2v 5962-9056402XA

HTS

8542.31.00.01

Instruction Set Architecture

CISC

Maximum CPU Frequency (MHz)

33

Maximum Clock Rate (MHz)

33

Data Bus Width (bit)

8

Programmability

No

USART

0

UART

0

I2C

0

I2S

0

CECC Qualified

No

Standard Package Name

DIP

Supplier Package

PDIP

Mounting

Through Hole

Package Height

4(Max)

Package Length

52.5(Max)

Package Width

14.1(Max)

PCB changed

40

Lead Shape

Through Hole

Part Status

Parts can have many statuses as they progress through the configuration, analysis, review, and approval stages.

Active

Pin Count

a count of all of the component leads (or pins)

40

RAM Size

512B

Program Memory Type

Program memory typically refers to flash memory when it is used to hold the program (instructions). Program memory may also refer to a hard drive or solid state drive (SSD). Contrast with data memory.

ROMLess

Core Architecture

8051

Ethernet

0

USB

0

SPI

0

Device Core

Used in casting and moulding processes to produce internal cavities and reentrant angles (an interior angle that is greater than 18°).

8051

RoHS Status

RoHS means “Restriction of Certain Hazardous Substances” in the “Hazardous Substances Directive” in electrical and electronic equipment.

RoHS non-compliant