Panasonic A1225A-PQ100C

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

YES

Number of Terminals

100

Package Description

PLASTIC, QFP-100

Package Style

FLATPACK

Moisture Sensitivity Levels

3

Package Body Material

PLASTIC/EPOXY

Package Equivalence Code

QFP100,.7X.9

Supply Voltage-Nom

5 V

Reflow Temperature-Max (s)

30

Supply Voltage-Min

4.75 V

Operating Temperature-Max

70 °C

Rohs Code

No

Manufacturer Part Number

A1225A-PQ100C

Clock Frequency-Max

75 MHz

Package Code

QFP

Package Shape

RECTANGULAR

Manufacturer

Microsemi Corporation

Part Life Cycle Code

Obsolete

Ihs Manufacturer

MICROSEMI CORP

Supply Voltage-Max

5.25 V

Risk Rank

5.84

JESD-609 Code

e0

Terminal Finish

TIN LEAD

Additional Feature

Any Feature, including a modified Existing Feature, that is not an Existing Feature.

PLD EQUIVALENT GATES=6250

Subcategory

Field Programmable Gate Arrays

Technology

CMOS

Terminal Position

QUAD

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

GULL WING

Peak Reflow Temperature (Cel)

225

Terminal Pitch

The center distance from one pole to the next.

0.65 mm

Reach Compliance Code

unknown

JESD-30 Code

R-PQFP-G100

Number of Outputs

83

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Power Supplies

an electronic circuit that converts the voltage of an alternating current (AC) into a direct current (DC) voltage.?

5 V

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

COMMERCIAL

Number of Inputs

83

Organization

451 CLBS, 2500 GATES

Seated Height-Max

3.4 mm

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

FIELD PROGRAMMABLE GATE ARRAY

Combinatorial Delay of a CLB-Max

5 ns

Number of CLBs

451

Number of Logic Cells

An FPGA contains a large number of logic cells. Each logic cell can be configured to implement a certain set of functions. Each logic cell has a fixed number of inputs and outputs. Flip-flop can be incorporated into a multiplexer-based logic module to implement sequential logic.

451

Number of Equivalent Gates

2500

Width

14 mm

Length

20 mm