National Semiconductor Corporation PAL16R8BJC

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

NO

Number of Terminals

20

Rohs Code

No

Part Life Cycle Code

Obsolete

Ihs Manufacturer

NATIONAL SEMICONDUCTOR CORP

Package Description

DIP, DIP20,.3

Clock Frequency-Max

40 MHz

Operating Temperature-Max

75 °C

Package Body Material

CERAMIC, GLASS-SEALED

Package Code

DIP

Package Equivalence Code

DIP20,.3

Package Shape

RECTANGULAR

Package Style

IN-LINE

Supply Voltage-Max

5.25 V

Supply Voltage-Min

4.75 V

Supply Voltage-Nom

5 V

JESD-609 Code

e0

Terminal Finish

TIN LEAD

HTS Code

HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

8542.39.00.01

Terminal Position

DUAL

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

THROUGH-HOLE

Terminal Pitch

The center distance from one pole to the next.

2.54 mm

Reach Compliance Code

unknown

JESD-30 Code

R-GDIP-T20

Number of Outputs

8

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

COMMERCIAL EXTENDED

Propagation Delay

the flight time of packets over the transmission link and is limited by the speed of light.

15 ns

Architecture

PAL-TYPE

Number of Inputs

8

Organization

8 DEDICATED INPUTS, 0 I/O

Seated Height-Max

5.08 mm

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

OT PLD

Output Function

An output function is a function that an optimization function calls at each iteration of its algorithm. Typically, you use an output function to generate graphical output, record the history of the data the algorithm generates, or halt the algorithm based on the data at the current iteration.

REGISTERED

Number of Dedicated Inputs

8

Number of Product Terms

64

Length

24.51 mm

Width

7.62 mm