Lattice Semiconductor GAL20V8B-20QPNI

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

NO

Number of Terminals

24

Package Description

LEAD FREE, PLASTIC, DIP-24

Package Style

IN-LINE

Package Body Material

PLASTIC/EPOXY

Operating Temperature-Min

-40 °C

Supply Voltage-Nom

5 V

Reflow Temperature-Max (s)

NOT SPECIFIED

Supply Voltage-Min

4.5 V

Operating Temperature-Max

85 °C

Rohs Code

Yes

Manufacturer Part Number

GAL20V8B-20QPNI

Clock Frequency-Max

41.6 MHz

Package Code

DIP

Package Shape

RECTANGULAR

Manufacturer

Lattice Semiconductor Corporation

Part Life Cycle Code

Obsolete

Number of I/O Lines

8

Ihs Manufacturer

LATTICE SEMICONDUCTOR CORP

Supply Voltage-Max

5.5 V

Risk Rank

5.66

Part Package Code

DIP

JESD-609 Code

e3

ECCN Code

EAR99

Terminal Finish

Matte Tin (Sn)

HTS Code

HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

8542.39.00.01

Technology

CMOS

Terminal Position

DUAL

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

THROUGH-HOLE

Peak Reflow Temperature (Cel)

NOT SPECIFIED

Terminal Pitch

The center distance from one pole to the next.

2.54 mm

Reach Compliance Code

unknown

Pin Count

a count of all of the component leads (or pins)

24

JESD-30 Code

R-PDIP-T24

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

INDUSTRIAL

Propagation Delay

the flight time of packets over the transmission link and is limited by the speed of light.

20 ns

Organization

12 DEDICATED INPUTS, 8 I/O

Seated Height-Max

5.334 mm

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

EE PLD

Output Function

An output function is a function that an optimization function calls at each iteration of its algorithm. Typically, you use an output function to generate graphical output, record the history of the data the algorithm generates, or halt the algorithm based on the data at the current iteration.

MACROCELL

Number of Dedicated Inputs

12

Width

7.62 mm

Length

31.75 mm