Cypress Semiconductor EPM5192LC84

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

YES

Number of Terminals

84

Part Life Cycle Code

Obsolete

Ihs Manufacturer

CYPRESS SEMICONDUCTOR CORP

Part Package Code

LCC

Package Description

QCCJ,

Clock Frequency-Max

33.3 MHz

Number of I/O Lines

64

Operating Temperature-Max

70 °C

Package Body Material

PLASTIC/EPOXY

Package Code

QCCJ

Package Shape

SQUARE

Package Style

CHIP CARRIER

Supply Voltage-Max

5.25 V

Supply Voltage-Min

4.75 V

Supply Voltage-Nom

5 V

Additional Feature

Any Feature, including a modified Existing Feature, that is not an Existing Feature.

192 MACROCELLS; SHARED INPUT/CLOCK; SHARED PRODUCT TERMS

HTS Code

HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

8542.39.00.01

Terminal Position

QUAD

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

J BEND

Terminal Pitch

The center distance from one pole to the next.

1.27 mm

Reach Compliance Code

unknown

Pin Count

a count of all of the component leads (or pins)

84

JESD-30 Code

S-PQCC-J84

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

COMMERCIAL

Propagation Delay

the flight time of packets over the transmission link and is limited by the speed of light.

55 ns

Organization

7 DEDICATED INPUTS, 64 I/O

Seated Height-Max

5.08 mm

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

OT PLD

Output Function

An output function is a function that an optimization function calls at each iteration of its algorithm. Typically, you use an output function to generate graphical output, record the history of the data the algorithm generates, or halt the algorithm based on the data at the current iteration.

MACROCELL

Number of Dedicated Inputs

7

Length

29.3116 mm

Width

29.3116 mm