AMD Xilinx XCR3256XL-7.5CSG280I

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

YES

Number of Terminals

280

Rohs Code

Yes

Part Life Cycle Code

Transferred

Ihs Manufacturer

XILINX INC

Part Package Code

BGA

Package Description

CHIP SCALE, BGA-280

Clock Frequency-Max

167 MHz

Moisture Sensitivity Levels

3

Number of I/O Lines

160

Operating Temperature-Max

85 °C

Operating Temperature-Min

-40 °C

Package Body Material

PLASTIC/EPOXY

Package Code

TFBGA

Package Equivalence Code

BGA280,19X19,32

Package Shape

SQUARE

Package Style

GRID ARRAY, THIN PROFILE, FINE PITCH

Supply Voltage-Max

3.6 V

Supply Voltage-Min

2.7 V

Supply Voltage-Nom

3.3 V

JESD-609 Code

e1

Pbfree Code

Yes

Terminal Finish

TIN SILVER COPPER

HTS Code

HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

8542.39.00.01

Terminal Position

BOTTOM

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

BALL

Terminal Pitch

The center distance from one pole to the next.

0.8 mm

Reach Compliance Code

compliant

Pin Count

a count of all of the component leads (or pins)

280

JESD-30 Code

S-PBGA-B280

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

INDUSTRIAL

Propagation Delay

the flight time of packets over the transmission link and is limited by the speed of light.

7.5 ns

Organization

160 I/O

Seated Height-Max

1.2 mm

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

EE PLD

Output Function

An output function is a function that an optimization function calls at each iteration of its algorithm. Typically, you use an output function to generate graphical output, record the history of the data the algorithm generates, or halt the algorithm based on the data at the current iteration.

MACROCELL

Length

16 mm

Width

16 mm