AMD Xilinx PZ5064N10A44

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

YES

Number of Terminals

44

Moisture Sensitivity Levels

3

Number of I/O Lines

32

Operating Temperature-Max

85 °C

Operating Temperature-Min

-40 °C

Package Body Material

PLASTIC/EPOXY

Package Code

QCCJ

Package Equivalence Code

LDCC44,.7SQ

Package Shape

SQUARE

Package Style

CHIP CARRIER

Supply Voltage-Max

5.5 V

Supply Voltage-Min

4.5 V

Supply Voltage-Nom

5 V

Clock Frequency-Max

80 MHz

Ihs Manufacturer

XILINX INC

Part Life Cycle Code

Transferred

Rohs Code

No

JESD-609 Code

e0

Terminal Finish

TIN LEAD

Additional Feature

Any Feature, including a modified Existing Feature, that is not an Existing Feature.

YES

HTS Code

HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

8542.39.00.01

Terminal Position

QUAD

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

J BEND

Peak Reflow Temperature (Cel)

225

Terminal Pitch

The center distance from one pole to the next.

1.27 mm

Reach Compliance Code

not_compliant

Time@Peak Reflow Temperature-Max (s)

30

JESD-30 Code

S-PQCC-J44

Number of Outputs

32

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

INDUSTRIAL

Propagation Delay

the flight time of packets over the transmission link and is limited by the speed of light.

12.5 ns

Architecture

PAL/PLA-TYPE

Number of Inputs

36

Organization

2 DEDICATED INPUTS, 32 I/O

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

EE PLD

Number of Macro Cells

64

JTAG BST

YES

Number of Dedicated Inputs

2

In-System Programmable

YES

Length

16.585 mm

Width

16.585 mm