ALTERA EPM7064BTC100-3

Mounting Type

Surface Mount

Package / Case

100-TQFP

Mount

Surface Mount

Number of Pins

100

Supplier Device Package

100-TQFP (14x14)

Product Status

Active

Mfr

PEI-Genesis

Package

Bulk

Number of I/Os

68

Number of Macrocells

64

Base Product Number

EPM7064

RoHS

Compliant

Memory Types

EEPROM

Series

*

Operating Temperature

The operating temperature is the range of ambient temperature within which a power supply, or any other electrical equipment, operate in. This ranges from a minimum operating temperature, to a peak or maximum operating temperature, outside which, the power supply may fail.

0°C ~ 70°C (TA)

Packaging

Semiconductor package is a carrier / shell used to contain and cover one or more semiconductor components or integrated circuits. The material of the shell can be metal, plastic, glass or ceramic.

Tray

Part Status

Parts can have many statuses as they progress through the configuration, analysis, review, and approval stages.

Obsolete

Max Operating Temperature

The Maximum Operating Temperature is the maximum body temperature at which the thermistor is designed to operate for extended periods of time with acceptable stability of its electrical characteristics.

70 °C

Min Operating Temperature

0 °C

Frequency

333.33 MHz

Base Part Number

EPM7064

Programmable Type

These include Field Programmable Logic Devices (FPGAs), Complex Programmable Logic Devices (CPLD) and Programmable Logic Devices (PLD, PLA, PAL, GAL). There are also devices that are the analog equivalent of these called field programmable analog arrays.

In System Programmable

Max Supply Voltage

In general, the absolute maximum common-mode voltage is VEE-0.3V and VCC+0.3V, but for products without a protection element at the VCC side, voltages up to the absolute maximum rated supply voltage (i.e. VEE+36V) can be supplied, regardless of supply voltage.

3.6 V

Min Supply Voltage

The minimum supply voltage (V min ) is explored for sequential logic circuits by statistically simulating the impact of within-die process variations and gate-dielectric soft breakdown on data retention and hold time.

3 V

Propagation Delay

the flight time of packets over the transmission link and is limited by the speed of light.

3.5 ns

Turn On Delay Time

Turn-on delay, td(on), is the time taken to charge the input capacitance of the device before drain current conduction can start.

3.5 ns

Number of Logic Elements/Cells

4

Number of Gates

The number of gates per IC varies depending on the number of inputs per gate. Two?input gates are common, but if only a single input is required, such as in the 744 NOT(or inverter) gates, a 14 pin IC can accommodate 6 (or Hex) gates.

1250

Max Frequency

303 MHz

Number of Programmable I/O

68

Number of Logic Blocks (LABs)

4

Voltage Supply - Internal

2.375 V ~ 2.625 V

Delay Time tpd(1) Max

3.5ns

Number of Logic Elements/Blocks

4