Altera EPF8452ALC84-6

Surface Mount

having leads that are designed to be soldered on the side of a circuit board that the body of the component is mounted on.

YES

Number of I/Os

64

Operating Temperature (Max.)

70°C

JESD-609 Code

e0

Number of Terminations

84

ECCN Code

EAR99

Terminal Finish

Tin/Lead (Sn/Pb)

Additional Feature

Any Feature, including a modified Existing Feature, that is not an Existing Feature.

452 FLIP FLOPS; 336 LOGIC ELEMENTS; CONFIGURABLE I/O OPERATION (3.3V OR 5V)

HTS Code

HTS (Harmonized Tariff Schedule) codes are product classification codes between 8-1 digits. The first six digits are an HS code, and the countries of import assign the subsequent digits to provide additional classification. U.S. HTS codes are 1 digits and are administered by the U.S. International Trade Commission.

8542.39.00.01

Terminal Position

QUAD

Terminal Form

Occurring at or forming the end of a series, succession, or the like; closing; concluding.

J BEND

Peak Reflow Temperature (Cel)

220

Supply Voltage

5V

Terminal Pitch

The center distance from one pole to the next.

1.27mm

Time@Peak Reflow Temperature-Max (s)

NOT SPECIFIED

Pin Count

a count of all of the component leads (or pins)

84

JESD-30 Code

S-PQCC-J84

Number of Outputs

64

Qualification Status

An indicator of formal certification of qualifications.

Not Qualified

Supply Voltage-Max (Vsup)

5.25V

Power Supplies

an electronic circuit that converts the voltage of an alternating current (AC) into a direct current (DC) voltage.?

3.3/55V

Temperature Grade

Temperature grades represent a tire's resistance to heat and its ability to dissipate heat when tested under controlled laboratory test conditions.

COMMERCIAL

Supply Voltage-Min (Vsup)

4.75V

Number of Inputs

68

Organization

4 DEDICATED INPUTS, 64 I/O

Programmable Logic Type

Generally, programmable logic devices can be described as being one of three different types: Simple programmable logic devices (SPLD) Complex programmable logic devices (CPLD) Field programmable logic devices (FPGA).

LOADABLE PLD

Output Function

An output function is a function that an optimization function calls at each iteration of its algorithm. Typically, you use an output function to generate graphical output, record the history of the data the algorithm generates, or halt the algorithm based on the data at the current iteration.

REGISTERED

Number of Logic Cells

An FPGA contains a large number of logic cells. Each logic cell can be configured to implement a certain set of functions. Each logic cell has a fixed number of inputs and outputs. Flip-flop can be incorporated into a multiplexer-based logic module to implement sequential logic.

336

Number of Dedicated Inputs

4

Length

29.3116mm

Height Seated (Max)

5.08mm

Width

29.3116mm

RoHS Status

RoHS means “Restriction of Certain Hazardous Substances” in the “Hazardous Substances Directive” in electrical and electronic equipment.

Non-RoHS Compliant